1. Field of the Disclosure
The present disclosure relates to electronic devices and processes, and more particularly to electronic devices including interconnects and cavities therebetween and processes of forming the same.
2. Description of the Related Art
Parasitic capacitive coupling within an integrated circuit can cause problems with signal loss for on-chip microstrip transmission lines at high frequencies. To reduce capacitive coupling to the ground plane, thicker insulating layers or lower dielectric constant (“k”) materials can be used. With a dielectric material such as SiO2, the insulating layer may need to be very thick, particularly for frequencies of at least 30 GHz. Thicker insulating layers cause manufacturing costs and complexity to increase. Much research has been performed on low-k materials. Currently, the most commonly used low-k material used in production is fluorinated silicon dioxide (k˜3). The low-k materials can be expensive, have processing constraints, have limited mechanical robustness, or the like.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the invention.